Synchronous Transfer Architecture (STA)

نویسندگان

  • Gordon Cichon
  • Pablo Robelly
  • Hendrik Seidel
  • Emil Matús
  • Marcus Bronzel
  • Gerhard Fettweis
چکیده

This paper presents a novel micro-architecture for high-performance and low-power DSPs. The underlying Synchronous Transfer Architecture (STA) fills the gap between SIMD-DSPs and coarse-grain reconfigurable hardware. STA processors are modeled using a common machine description suitable for both compiler and core generator. The core generator is able to generate models in Lisa, System-C, and VHDL. A special emphasis is placed on the good synthesis of the generated VHDL model.

برای دانلود متن کامل این مقاله و بیش از 32 میلیون مقاله دیگر ابتدا ثبت نام کنید

ثبت نام

اگر عضو سایت هستید لطفا وارد حساب کاربری خود شوید

منابع مشابه

Formal Semantics of Synchronous Transfer Architecture

This paper explores the use of formal verification methods for complex and highly parallel state machines. For this purpose, a framework named Synchronous Transfer Architecture (STA) is being used. STA is a generic framework for digital hardware development that contains VLIW, FPGA, and hardwired ASIC architectures as corner cases. It maintains a strictly deterministic system behavior in order ...

متن کامل

Code Generation for STA Architecture

This paper presents a novel compiler backend which generates assembly code for Synchronous Transfer Architecture (STA). STA is a Very Long Instruction Word (VLIW) architecture and in addition it uses a non-orthogonal Instruction Set Architecture (ISA). Generating efficient code for this architecture needs highly optimizing techniques. The compiler backend presented in this paper is based on Int...

متن کامل

Two-Dimensional Fast Cosine Transform for Vector-STA Architectures

A vector algorithm for the computation of the twodimensional Discrete Cosine Transform (2D-VDCT) is presented. The formulation of 2D-VDCT by means of elements of multilinear algebra offers not only a formalism for describing the algorithm, but it enables the derivation by pure algebraic manipulations of an algorithm that is well suited to be implemented in vectorSIMD signal processors with a sc...

متن کامل

A Basic Data Routing Model for a Coarse-Grain Reconfigurable Hardware

Synchronous Transfer Architecture (STA) is a coarse-grain reconfigurable hardware. It is modelled by using a common machine description that is suitable for both compiler and core generator. STA is a Very Long Instruction Word (VLIW) architecture and in addition it uses a non-orthogonal Instruction Set Architecture (ISA). Generating efficient code for such ISA needs highly optimizing techniques...

متن کامل

SAMIRA: A SIMD-DSP architecture targeted to the Matlab source language

This paper presents a novel processor architecture tailored to the efficient execution of digital signal processing algorithms efficiently that are developed using the Matlab programming language. Based on the synchronous transfer architecture (STA) and SIMD processing the goal of the architecture is the minimization of the overhead associated with programmability when compared to hardwired sol...

متن کامل

ذخیره در منابع من


  با ذخیره ی این منبع در منابع من، دسترسی به آن را برای استفاده های بعدی آسان تر کنید

برای دانلود متن کامل این مقاله و بیش از 32 میلیون مقاله دیگر ابتدا ثبت نام کنید

ثبت نام

اگر عضو سایت هستید لطفا وارد حساب کاربری خود شوید

عنوان ژورنال:

دوره   شماره 

صفحات  -

تاریخ انتشار 2004